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Printed Circuit Board

Interface Board

  • Robust performance and seamless system compatibility are ensured through precision-engineered test solutions

Information

Design Tool
Allegro
Simulation
Power Si, Power DC, ADS, HFSS
Pitch
Min. 0.27mm ~ (HPL, BVH, Build-up)
Aspect Ratio
Standard (26 : 1), Advanced (32 : 1)
Customizable
System Level Test Boards
* Delivery Regardless of Pitch (30Layer 10pcs / Inquiry for Details)

Applications

㈜티에프이 / 본사

경기도 화성시 병점구 반월길 50-8 (우 : 18384)

TEL : 031-206-0541 FAX : 031-206-0543 사업자등록번호 122-81-79714

JMT INC. / 자회사  LINK ↗

289-1 Yaenda, Hidaka City, Saitama, Japan (日 : 〒350-1236 埼玉県日高市猿田２８９－１)

TEL : +81-42-985-8855 FAX : +81-42-985-8860 E-mail : mt_01@jmt21.jp

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